Design, Analysis and Test of Logic Circuits Under Uncertainty
Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs,...
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| Hlavní autoři: | , , |
|---|---|
| Médium: | Livre numérique |
| Jazyk: | Anglais |
| Vydáno: |
Dordrecht :
Springer Netherlands
2013.
Cham : Springer Nature |
| Edice: | Lecture Notes in Electrical Engineering
115 |
| On-line přístup: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Poznámka: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Design, Analysis and Test of Logic Circuits Under Uncertainty, Texte imprimé, 9789048196432 • Design, Analysis and Test of Logic Circuits Under Uncertainty, Texte imprimé, 9789048196456 • Design, Analysis and Test of Logic Circuits Under Uncertainty, Texte imprimé, 9789400797987 |
Obsah:
- Introduction
- Probabilistic Transfer Matrices
- Computing with Probabilistic Transfer Matrices
- Testing Logic Circuits for Probabilistic Faults
- Signtaure-based Reliability Analysis
- Design for Robustness
- Summary and Extensions.