Hardware specification, verification, and synthesis : mathematical aspects : Mathematical Sciences Institute workshop, Cornell University Ithaca, New York, USA, July 5-7, 1989 : proceedings

Current research into formal methods for hardware design is presented in the papers in this volume. Because of the complexity of VLSI circuits, assuring design validity before circuits are manufactured is imperative. The goal of research in this area is to develop methods of improving the design pro...

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Diğer Yazarlar: Leeser, Miriam, 1958- (Yayın yönetmeni), Brown, Geoffrey (Yayın yönetmeni)
Materyal Türü: Livre numérique
Dil:Anglais
Baskı/Yayın Bilgisi: New York, NY : Springer-Verlag : Springer e-books [20..].
Cham : Springer Nature
Seri Bilgileri:Lecture notes in computer science 408
Konular:
Online Erişim:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Not: Actes d'un séminaire tenu à Ithaca du 5 au 7 juillet 1989, d'après l écran-titre
Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Hardware specification, verification, and synthesis, mathematical aspects, proceedings, Mathematical Sciences Institute workshop, Cornell University Ithaca, New York, USA, July 5-7, 1989, Berlin, Springer-Verlag, 1990, 1 vol. (VI-402 p.), Lecture notes in computer science, 0-387-97226-9
• Hardware Specification, Verification and Synthesis: Mathematical Aspects, Texte imprimé, 9781475789287
İçindekiler:
  • Design for verifiability
  • Verification of synchronous circuits by symbolic logic simulation
  • Constraints, abstraction, and verification
  • Formalising the design of an SECD chip
  • Reasoning about state machines in higher-order logic
  • A mechanically derived systolic implementation of pyramid initialization
  • Behavior-preserving transformations for high-level synthesis
  • From programs to transistors: Verifying hardware synthesis tools
  • Combining engineering vigor with mathematical rigor
  • Totally verified systems: Linking verified software to verified hardware
  • What's in a timing discipline? Considerations in the specification and synthesis of systems with interacting asynchronous and synchronous components
  • Complete trace structures
  • The design of a delay-insensitive microprocessor: An example of circuit synthesis by program transformation
  • Manipulating logical organization with system factorizations
  • The verification of a bit-slice ALU
  • Verification of a pipelined microprocessor using clio
  • Verification of combinational logic in Nuprl
  • Veritas+: A specification language based on type theory
  • Categories for the working hardware designer.