PARLE '89 Parallel architectures and languages Europe. Eindhoven, The Netherlands, June 12 16, 1989 : proceedings Volume I, parallel Architectures :

Since the first PARLE conference, PARLE '87, attracted more than 300 participants, it was considered a useful and successful forum and encouraged the organization of this second issue known as PARLE '89. The initiative for these conferences was taken by project 415 of ESPRIT (the European...

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Corporate Author: Conference on parallel architectures and languages Europe :Eindhoven, Pays-Bas
Other Authors: Odijk, Eddy (Publishing director), Rem, Martin (Publishing director), Syre, Jean-Claude (Publishing director)
Format: Livre numérique
Language:Anglais
Published: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
Series:Lecture notes in computer science 365
Subjects:
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Accès Université d'Orléans
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Note: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Parallel architectures and languages Europe, vol. 1, proceedings, ed. C. Syre, et al, Berlin, Springer, 1989, 1 vol. (XIII-476 p.), Lecture notes in computer science - LNCS, 3-540-51284-5
• PARLE '89 - Parallel Architectures and Languages Europe, Texte imprimé, 9783540512844
• PARLE '89 - Parallel Architectures and Languages Europe, Texte imprimé, 9783662202494
Table of Contents:
  • The cache coherence protocol of the Data Diffusion Machine
  • Universal mechanisms for concurrency
  • Serial multiport memory multiprocessors
  • Modeling and analysis of multiprocessor systems with priority and multiple resources allocation to the tasks
  • Achieving low cost synchronization in a multiprocessor system
  • The Synchronous Dataflow MAchine: Architecture and performance
  • The lady programming environment for distributed operating systems
  • A static scheduling system for a parallel machine (SM)2-II
  • Distributed implementation of programmed graph reduction
  • Parallel object-oriented descriptions of graph reduction machines
  • MaRS, a combinator graph reduction multiprocessor
  • High-performance parallel graph reduction
  • An efficient distributed garbage collection algorithm
  • Mark DURING sweep rather than mark THEN sweep
  • Architecture of a communication network processor
  • The feasibility of a general-purpose parallel computer using WSI
  • A coarse grain parallel architecture for functional languages
  • A Functional Programming environment supporting execution, partial execution and transformation
  • The gene concept and its implementation for a dataflow schemed parallel computer
  • Hybrid structure: A scheme for handling data structures in a data flow environment
  • Implementation conditions for delay insensitive circuits
  • POOL and DOOM a survey of esprit 415 subproject A, Philips research laboratories
  • Multi-level simulator for VLSI on the parallel object-oriented machine
  • Overview of a parallel reduction machine project II
  • A parallel database accelerator
  • IDEAL & K-LEAF implementation: a progress report
  • The sto//mann data flow machine
  • Partheo: A parallel inference machine ESPRIT 415 subproject F.