CONPAR 86 : conference on algorithms and hardware for parallel processing, Aachen, September 17-19, 1986 : proceedings

সংরক্ষণ করুন:
গ্রন্থ-পঞ্জীর বিবরন
সংস্থা লেখক: Conference on algorithms and hardware for parallel processing :Aix-la-Chapelle
অন্যান্য লেখক: Jeltsch, Rolf, 1945- (Publishing director), Händler, Wolfgang, 1920-1998 (Publishing director), Haupt, Dieter (Publishing director)
বিন্যাস: Livre numérique
ভাষা:Anglais
প্রকাশিত: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
মালা:Lecture notes in computer science 237
বিষয়গুলি:
অনলাইন ব্যবহার করুন:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
টীকা: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• CONPAR 86, conference on algorithms and hardware for parallel processing, Aachen, September 17-19, 1986, proceedings, ed. by Wolfgang Handler, Dieter Haupt, Rolf Jeltsch, Wilfried Juling et al, Berlin, Springer, 1986, 1 vol. (IX-418 p.), Lecture notes in computer science, 3-540-16811-7
• CONPAR 86, Texte imprimé, 9783662209974
সূচিপত্রের সারণি:
  • A radically non-von-Neumann-architecture for learning and discovery
  • The parallel solution of sparse linear equations
  • Parallel algorithms on the cedar system
  • Future parallel computers
  • SUPRENUM an MIMD multiprocessor system for multi-level scientific computing
  • An adaptable cluster structure of (sm)2 -II
  • Memory conflicts in MIMD-computers a performance analysis
  • The digital optical computing program at Erlangen
  • Hmesh: A vlsi architecture for parallel processing
  • FFT on a new parallel vector processor
  • Analysis of multigrid methods for non-shared memory systems by a simple performance model
  • Multitasking algorithms on CRAY computers for interval arithmetic Newton-like methods for a class of systems of nonlinear equations
  • Full recursive form of the algorithms for fast generalized fourier transforms
  • SISAL: Initial MIMD performance results
  • Caltech hypercube MIMD computer performances measurements in a physical mathematical application
  • A new approach to decentralized control of job scheduling
  • Synchronous communication of cooperating processes in the M5PS multiprocessor
  • Parallel implementation of the algebraic path problem
  • Implementing branch-and-bound in a ring of processors
  • Synthesis of systolic algorithms and processor arrays
  • Fraktale und ihre Untersuchung mit Parallelrechnung
  • A parallel processing algorithm for thinning digitised pictures
  • Fault-tolerant hardware configuration management on the multiprocessor system DIRMU 25
  • A general purpose pipelined ring architecture
  • An adaptive parallel algorithm for display of CSG objects
  • A packet based demand/data driven reduction model for the parallel execution of logic programs
  • Information processing with associative processors
  • A high performance interconnection concept fordataflow- or other closely coupled multiprocessors
  • Parallel solution of eigenvalue problems in acoustics on the Distributed Array Processor (DAP)
  • Gauss elimination algorithms for mimd computers
  • Fast parallel algorithms for eigenvalue and singular value computations
  • A new Parallel algorithm for solving general linear systems of equations
  • Generalized asynchronous iterations
  • Parallel compilation on a multiprocessor system
  • Semi-automatic parallelization of fortran programs
  • Code generation for partially vectorizable loops in the vectorizing Pascal-XT compiler
  • Automatic vectorisation for high level languages based on an expert system
  • Hierarchical array processor system (HAP)
  • Ocsamo a systolic array for matrix operations
  • A general approach to sorting on 3-dimensionally mesh-connected arrays
  • Complexity of parallel partitioned algorithms
  • Shuffle/exchange is the natural interconnection scheme for the parallel fast fourier transform
  • Kronecker products of matrices and their implementation on shuffle/exchange-type processor networks
  • Lisa: A parallel processing architecture
  • A classification of algorithms which are well suited for implementations on the DAP as a basis for further research on parallel programming
  • Use of inherent parallelism in database operations
  • Parallel dynamic programming algorithms
  • Multiprocessors: Main trends and dead ends
  • Toward the parallel inference machine.