Supercomputing : 1st international conference, Athens, Greece, June 8-12, 1987 : proceedings

The 1st International Conference on Supercomputing took place in Athens, Greece, June 8-12, 1987. The purpose of this conference was to bring together researchers from universities, industrial laboratories, and other research institutions with common interests in architectures and hardware technolog...

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Detaylı Bibliyografya
Müşterek Yazar: International conference on supercomputing :Athènes
Diğer Yazarlar: Polychronopoulos, Constantine D., 1958- (Yayın yönetmeni), Papatheodorou, Theodore S., 19..- (Yayın yönetmeni), Houstis, Elias N., 19..- (Yayın yönetmeni)
Materyal Türü: Livre numérique
Dil:Anglais
Baskı/Yayın Bilgisi: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
Seri Bilgileri:Lecture notes in computer science 297
Konular:
Online Erişim:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Not: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Supercomputing, 1st international conference, Athens, Greece, June 8-12, 1987, proceedings, ed. E.N. Houstis, T.S. Papatheodorou, C.D. Polychronopoulos, Berlin, Springer, 1988, 1 vol. (X-1033 p.), Lecture notes in computer science, 3-540-18991-2
• Supercomputing, Texte imprimé, 9783662183359
İçindekiler:
  • A supercomputing performance evaluation plan
  • A perspective on parallel processing
  • Parallel multigrid methods: Implementation on SUPRENUM-like architectures and applications
  • Using memory in the Cedar system
  • Another combining scheme to reduce hot spot contention in large scale shared memory parallel computers
  • Applications environment for the IBM Research Parallel Processor Prototype (RP3)
  • High speed interconnection using the clos network
  • Multipath hierarchies in interconnection networks
  • Performance analysis of multi-buffered packet-switching networks in multiprocessor systems
  • Analysis of interprocedural side effects in a parallel programming environment
  • Design and rationale for MUPPET a programming environment for message based multiprocessors
  • An overview of the PTRAN analysis system for multiprocessing
  • Tools for performance evaluation of parallel machines
  • Strategies for cache and local memory management by global program transformation
  • Advanced loop optimizations for parallel computers
  • MIMD-parallelization for SUPRENUM
  • Loop quantization or unwinding done right
  • Vector optimization vs. vectorization
  • The performance of software-managed multiprocessor caches on parallel numerical programs
  • Realization of a knowledge-based parallelization tool in a programming environment
  • Incremental performance contributions of hardware concurrency extraction techniques
  • Access patterns: A usefull concept in vector programming
  • Scheduling sequential loops on parallel processors
  • Management of PDE-software for supercomputing
  • Implementing codes on a SIMD/SPMD architecture application to a subset of eispack
  • Supercomputing about physical objects
  • The LINPACK Benchmark: An explanation
  • Cluster-partitioning approaches to mapping parallel programs onto a hypercube
  • A parallel graph partitioning algorithm for a message-passing multiprocessor
  • The mapping of applications to multiple bus and Banyan interconnected multiprocessor systems: A case study
  • Communication and control costs of domain decomposition on loosely coupled multiprocessors
  • Half-dynamic scheduling with data-flow control
  • A parallel block cyclic reduction algorithm for the fast solution of elliptic equations
  • Parallel LU-factorization algorithms for dense matrices
  • A group explicit solution scheme for non-linear parabolic PDES on MIMD parallel systems
  • Gaussian elimination on message passing architecture
  • Basic linear algebra computations on the Sperry ISP
  • Future scientific programming on parallel machines
  • Design and scheduling of mesh array of hardware unifiers for large-scale unification
  • A systolic array structure for matrix multiplication in the residue number system
  • VLSI arrays with reconfigurable buses
  • A Wavefront Array Processor using dataflow processing elements
  • Finite element methods on parallel and vector computers application in fluid dynamics
  • LU factorization with maximum performances on FPS architectures 38/64 bit
  • MSC/NASTRAN onamdahl vector processors: Adaptation and performance
  • Parallel systolic LU factorization for simplex updates
  • Solving elliptic problems by the domain decomposition method using preconditioning matrices derived by multilevel splittings of the finite element matrix
  • Major research activities in parallel processing in Japan
  • A high resolution parallel Legendre transform algorithm
  • Parallelization of a reservoir simulator
  • A computer graphics rendering algorithm for use on a SIMD machine
  • Benchmark of the extended Basic Linear Algebra Subprograms on the NEC SX-2 supercomputer
  • Least-squares iterative solution on a fixed-size VLSI architecture
  • Parallel matrix factorizations on a shared memory MIMD computer
  • Fast parallel algorithms for processing of joins
  • Performance analysis for a join processor
  • Parallel algorithms for parenthesis matching and generation of random balanced sequences of parentheses
  • Superlinear speedup for parallel backtracking
  • On the processing time of aparallel linear system solver
  • A RISC-type structural design of the Hermes multiprocessor kernel
  • Supercomputing in Europe 1987
  • Domain decomposition in distributed and shared memory environments
  • A technique for compiling execution graph expressions for restricted and-parallelism in logic programs.