Field-programmable logic : architectures, synthesis, and applications : 4th International Workshop on Field-Programmable Logic and Applications, FPL '94 Prague, Czech Republic, September 7 9, 1994 : proceedings

This volume contains the proceedings of the 4th International Workshop on Field-Programmable Logic and Applications (FPL '94), held in Prague, Czech Republic in September 1994. The growing importance of field-programmable devices is substantiated by the remarkably high number of 116 submissions...

Celý popis

Uloženo v:
Podrobná bibliografie
Korporativní autor: International workshop on field-programmable logic and applications :Prague
Další autoři: Hartenstein, Reiner, 1934- (Šéfredaktor, odpovědný redaktor), Servít, Michal Z. (Šéfredaktor, odpovědný redaktor)
Médium: Livre numérique
Jazyk:Anglais
Vydáno: Berlin [etc.] : Springer [20..].
Cham : Springer Nature
Edice:Lecture notes in computer science 849
Témata:
On-line přístup:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Poznámka: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Field-programmable logic, architectures, synthesis, and applications, 4th International Workshop on Field-Programmable Logic and Applicaitons, FPL '94, Prague, Czech Republic, September 7-9, 1994, proceedings, Reiner Hartenstein, Michal Z. Servít, eds, Berlin, Springer-Verlag, 1994, 1 vol. (XI-434 p.), Lecture notes in computer science, 0-387-58419-6
• Field-Programmable Logic: Architectures, Synthesis and Applications, Texte imprimé, 9783662214015
LEADER 07928nam a22004217a 4500
001 944792
008 110927q2000 xxe ||| |||| 00| 0 eng d
009 PPN155202081
020 |a 9783540487838 (PDF) 
041 0 |a eng 
082 |a 004 
082 |a 621.395 
111 2 |a International workshop on field-programmable logic and applications  |n (04  |d  :1994  |c  :Prague). 
245 1 0 |a Field-programmable logic :  |b architectures, synthesis, and applications : 4th International Workshop on Field-Programmable Logic and Applications, FPL '94 Prague, Czech Republic, September 7 9, 1994 : proceedings   |c [edited by] Reiner W. Hartenstein, Michal Z. Servít. 
260 |a Berlin [etc.] :  |b Springer. 
260 |a Cham :  |b Springer Nature,  |c [20..]. 
490 0 |a Lecture notes in computer science  |v 849  |x 1611-3349 
500 |a Archives Springer e-books (Licence nationale) 
500 |a Archives Springer e-books (Licence nationale) 
505 0 |a Fault modeling and test generation for FPGAs -- A test methodology applied to Cellular logic Programmable Gate Arrays -- Integrated layout synthesis for FPGA's -- Influence of logic block layout architecture on FPGA performance -- A global routing heuristic for FPGAs based on mean field annealing -- Power dissipation driven FPGA place and route under delay constraints -- FPGA technology mapping for power minimization -- Specification and synthesis of complex arithmetic operators for FPGAs -- A speed-up technique for synchronous circuits realized as LUT-based FPGAs -- An efficient technique for mapping RTL structures onto FPGAs -- A testbench design method suitable for FPGA-based prototyping of reactive systems -- Using consensusless covers for fast operating on Boolean functions -- Formal verification of timing rules in design specifications -- Optimized synthesis of self-testable finite state machines (FSM) using BIST-PST structures in Altera structures -- A high-speed rotation processor -- The MD5 message-digest algorithm in the XILINX FPGA -- A reprogrammable processor for fractal image compression -- Implementing GCD systolic Arrays on FPGA -- Formal CAD techniques for safety-critical FPGA design and deployment in embedded subsystems -- Direct sequence spread spectrum digital Radio DSP prototyping using xilinx FPGAs -- FPGA based reconfigurable architecture for a compact vision system -- A new FPGA architecture for word-oriented datapaths -- Image processing on a custom computing platform -- A superscalar and reconfigurable processor -- A fast FPGA implementation of a general purpose neuron -- Data-procedural languages for FPL-based machines -- Implementing on line arithmetic on PAM -- Software environment for WASMII: A data driven machine with a virtual hardware -- Constraint-based hierarchical placement of parallel programs -- ZAREPTA: A zero lead-time, all reconfigurable system for emulation, prototyping and testing of ASICs -- Simulating static and dynamic faults in BIST structures with a FPGA based emulator -- FPGA based prototyping for verification and evaluation in hardware-software cosynthesis -- FPGA based low cost Generic Reusable Module for the rapid prototyping of subsystems -- FPGA development tools: Keeping pace with design complexity -- Meaningful benchmarks for logic optimization of table-lookup FPGAs -- Educational use of Field Programmable Gate Arrays -- Hardwire: A risk-free FPGA-to-ASIC migration path -- Reconfigurable hardware from programmable logic devices -- On some limits of XILINX based control logic implementations -- Experiences of using XBLOX for implementing a digital filter algorithm -- Continuous interconnect provides solution to density/performance trade-off in programmable logic -- A high density complex PLD family optimized for flexibility, predictability and 100% routability -- Design experience with fine-grained FPGAs -- FPGA routing structures from real circuits -- A tool-set for simulating altera-PLDs using VHDL -- A CAD tool for the development of an Extra-Fast Fuzzy Logic Controller based on FPGAs and memory modules -- Performance characteristics of the Monte-Carlo clustering processor (MCCP) - a field programmable logic based custom computing machine -- A Design Environment with Emulation of Prototypes for hardware/software systems using XILINX FPGA -- DSP development with full-speed prototyping based on HW/SW codesign techniques -- The architecture of a general-purpose processor cell -- The design of a stack-based microprocessor -- Implementation and performance evaluation of an image pre-processing chain on FPGA -- Signature testability of PLA -- A FPL prototyping package with a C++ interface for the PC bus -- Design of safety systems using Field Programmable Gate Arrays -- A job dispatcher-collector made of FPGA's for a centralized Voice Server -- An optoelectronic 3-D Field Programmable Gate Array -- On channel architecture and routability for FPGA's under faulty conditions -- High-performance datapath implementation on Field-Programmable Multi-Chip Module (FPMCM) -- A laboratory for a digital design course using FPGAs -- Coordinate Rotation DIgital Computer (CORDIC) synthesis for FPGA -- MARC: A Macintosh NUBUS-expansion board based reconfigurable test system for validating communication systems -- Artificial neural network implementation on a fine-grained FPGA. 
506 |a Accès en ligne pour les établissements français bénéficiaires des licences nationales 
506 |a Accès soumis à abonnement pour tout autre établissement 
506 |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 
520 |a This volume contains the proceedings of the 4th International Workshop on Field-Programmable Logic and Applications (FPL '94), held in Prague, Czech Republic in September 1994. The growing importance of field-programmable devices is substantiated by the remarkably high number of 116 submissions for FPL '94; from them, the revised versions of 40 full papers and 24 high-quality poster presentations were accepted for inclusion in this volume. Among the topics treated are: testing, layout, synthesis tools, compilation research and CAD, trade-offs and experience, innovations and smart applications, FPGA-based computer architectures, high-level design, prototyping and ASIC emulators, commercial devices, new tools, CCMs and HW/SW co-design, modelers, educational experience, and novel architectures. 
650 |a Informatique 
650 |a Réseaux logiques programmables 
650 |a Ingénierie assistée par ordinateur 
650 |a Structure logique 
650 |a Actes de congrès 
700 1 |a Hartenstein, Reiner,  |d 1934-  |4 pbd 
700 1 |a Servít, Michal Z.  |4 pbd 
776 0 |0 020688075  |t Field-programmable logic  |o architectures, synthesis, and applications  |o 4th International Workshop on Field-Programmable Logic and Applicaitons, FPL '94, Prague, Czech Republic, September 7-9, 1994  |o proceedings  |f Reiner Hartenstein, Michal Z. Servít, eds  |c Berlin  |n Springer-Verlag  |d 1994  |p 1 vol. (XI-434 p.)  |s Lecture notes in computer science  |z 0-387-58419-6 
776 0 |t Field-Programmable Logic: Architectures, Synthesis and Applications  |b Texte imprimé  |z 9783662214015 
856 4 |q PDF  |u https://doi.org/10.1007/3-540-58419-6  |z Accès sur la plateforme de l'éditeur 
856 4 |u https://revue-sommaire.istex.fr/ark:/67375/8Q1-P6ZSX5T2-9  |z Accès sur la plateforme Istex 
856 4 |5 452349901:747916454  |u https://ezproxy.univ-orleans.fr/login?url=https://doi.org/10.1007/3-540-58419-6  |z Accès Université d'Orléans 
856 4 |5 180339901:750929057  |u https://ezproxy.insa-cvl.fr/login?qurl=https://doi.org/10.1007/3-540-58419-6  |z Accès INSA CVL 
997 |0 944792  |1 Livre numérique  |a Ressource numérique  |b INSA  |b ENSA  |c 0/Bibliothèque numérique/  |c 1/Bibliothèque numérique/Autre ressource numérique/