Processor and system-on-chip simulation

Processor and System-on-Chip Simulation Edited by: Rainer Leupers Olivier Temam The current trend from monolithic processors to multicore and multiprocessor systems on chips (MPSoC) with tens of cores and gigascale integration makes hardware architecture and software design more and more complex and...

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Altri autori: Leupers, Rainer (Direttore editoriale), Temam, Olivier (Direttore editoriale)
Natura: Livre numérique
Lingua:Anglais
Pubblicazione: New York, NY : Springer US 2010.
Cham : Springer Nature
Accesso online:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Nota: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Processor and system-on-chip simulation, edited by Rainer Leupers, Olivier Temam, 2010, New York, Springer, 1 vol. (XIII-345 p.), 978-1-4419-6174-7
• Processor and System-on-Chip Simulation, Texte imprimé, 9781441961761
• Processor and System-on-Chip Simulation, Texte imprimé, 9781489996077
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505 0 |a System Simulation and Exploration -- The Life Cycle of a Virtual Platform -- Full-System Simulation from Embedded to High-Performance Systems -- Toward the Datacenter: Scaling Simulation Up and Out -- Modular ISA-Independent Full-System Simulation -- Structural Simulation for Architecture Exploration -- Fast Simulation -- Accelerating Simulation with FPGAs -- Scalable Simulation for MPSoC Software and Architectures -- Adaptive High-Speed Processor Simulation -- Representative Sampling Using SimPoint -- Statistical Sampling -- Efficient Cache Modeling with Sparse Data -- Statistical Simulation -- Impact of Silicon Technology -- Memory Modeling with CACTI -- Thermal Modeling for Processors and Systems-on-Chip -- Rapid Technology-Aware Design Space Exploration for Embedded Heterogeneous Multiprocessors -- Embedded Systems Simulation -- IP Modeling and Verification -- Configurable, Extensible Processor System Simulation -- Simulation Acceleration in Wireless Baseband Processing -- Trace-Driven Workload Simulation for MPSoC Software Performance Estimation. 
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520 |a Processor and System-on-Chip Simulation Edited by: Rainer Leupers Olivier Temam The current trend from monolithic processors to multicore and multiprocessor systems on chips (MPSoC) with tens of cores and gigascale integration makes hardware architecture and software design more and more complex and costly. Therefore, simulation technology has become an extremely important pre-silicon verification and optimization vehicle. Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization, as well as functional and timing verification. Recent, innovative technologies, such as retargetable simulator generation, dynamic binary translation and sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. This book presents and discusses the principle technologies and state-of-the-art in high-level architecture software simulation, both at the processor and the system-on-chip level. Presents state-of-the-art and future trends in processor and SoC simulation; Demonstrates how simulation helps to boost hardware and software design productivity; Addresses simulation requirements and technologies in the multicore context; Covers system aspects, such as virtual platforms, bus simulation, caches, power, and design space exploration. 
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