Emerging technologies and circuits
With the semiconductor market growth, new Integrated Circuit designs are pushing the limit of the technology and in some cases, require specific fine-tuning of certain process modules in manufacturing. Thus the communities of design and technology are increasingly intertwined. The issues that requir...
Gardado en:
| Outros autores: | , , |
|---|---|
| Formato: | Livre numérique |
| Idioma: | Anglais |
| Publicado: |
Dordrecht :
Springer Netherlands
[20..].
Cham : Springer Nature |
| Edición: | 1st ed. 2010. |
| Series: | Lecture Notes in Electrical Engineering
66 |
| Acceso en liña: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Nota: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Emerging technologies and circuits, Amara Amara, Thomas Ea, Marc Belleville., 2010, Dordrecht, Springer, 1 vol. (IX-264 p.), Lecture notes in electrical engineering, 978-90-481-9378-3 |
Table des matières:
- Synergy Between Design and Technology: A Key Factor in the Evolving Microelectronic Landscape EMERGING TECHNOLOGY AND DEVICES New State Variable Opportunities Beyond CMOS: A System Perspective A Simple Compact Model to Analyze the Impact of Ballistic and Quasi-Ballistic Transport on Ring Oscillator Performance ADVANCED DEVICES AND CIRUITS Low-Voltage Scaled 6T FinFET SRAM Cells Independent-Double-Gate FINFET SRAM Cell for Drastic Leakage Current Reduction Metal Gate Effects on a 32 nm Metal Gate Resistor RELIABILITY AND SEU Threshold Voltage Shift Instability Induced by Plasma Charging Damage in MOSFETS with High-K Dielectric Analysis of SI Substrate Damage Induced by Inductively Coupled Plasma Reactor with Various Superposed Bias Frequencies POWER, TIMING AND VARIABILITY CMOS SOI Technology for WPAN: Application to 60 GHZ LNA SRAM Memory Cell Leakage Reduction Design Techniques in 65 nm Low Power PD-SOI CMOS Resilient Circuits for Dynamic Variation Tolerance Process Variability-Induced Timing Failures A Challenge in Nanometer CMOS Low-Power Design How Does Inverse Temperature Dependence Affect Timing Sign-Off CMOS Logic Gates Leakage Modeling Under Statistical Process Variations On-Chip Circuit Technique for Measuring Jitter and Skew with Picosecond Resolution ANALOG AND MIXED SIGNAL DC DC Converter Technologies for On-Chip Distributed Power Supply Systems 3D Stacking and Hybrid Operation Sampled Analog Signal Processing: From Software-Defined to Software Radio