CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications
While the throughput of microprocessor systems tends to increase as a result of ongoing technology scaling and the advent of multi-core systems, the off-chip I/O communication bandwidth emerges as one of the potential bottlenecks that limit overall performance. In order to alleviate the communicatio...
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| Auteurs principaux: | , , |
|---|---|
| Format: | Livre numérique |
| Langue: | Anglais |
| Publié: |
Dordrecht :
Springer Netherlands
[20..].
Cham : Springer Nature |
| Édition: | 1st ed. 2007. |
| Collection: | Analog Circuits and Signal Processing
|
| Accès en ligne: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Note: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • CMOS multichannel single-chip receivers for multi-gigabit optical data communications, by Paul Muller and Yusuf Leblebici, Dordrecht, Springer, 2007, 1 vol. (XX-191 p.), Analog circuits and signal processing series, 978-1-4020-5911-7 • CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications, Texte imprimé, 9789048174737 • CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications, Texte imprimé, 9789048112760 |
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| 100 | 1 | |a Muller, Paul, |d 1948-...., |c ingénieur. | |
| 245 | 1 | 0 | |a CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications |c by Paul Muller, Yusuf Leblebici. |
| 250 | |a 1st ed. 2007. | ||
| 260 | |a Dordrecht : |b Springer Netherlands. | ||
| 260 | |a Cham : |b Springer Nature, |c [20..]. | ||
| 490 | 0 | |a Analog Circuits and Signal Processing |x 2197-1854 | |
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 1 | |a From the contents About the Authors. Foreword. Constants, Symbols and Acronyms 1 Introduction 2 Integrated Photonic Systems 3 Basic Concepts 4 System-Level Specifications 5 Silicon Photodetector 6 Transimpedance Amplifier Design 7 Limiting Amplifier Design 8 Clock and Data Recovery Circuit 9 Conclusions References | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. https://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a While the throughput of microprocessor systems tends to increase as a result of ongoing technology scaling and the advent of multi-core systems, the off-chip I/O communication bandwidth emerges as one of the potential bottlenecks that limit overall performance. In order to alleviate the communication speed constraints, optical data communication interfaces move ever closer to the processor core. It is widely expected that future generation digital systems will increasingly rely on chip-to-chip and board-to-board optical data communications for higher bandwidth and better noise immunity. This book focuses on optical communications for short and very short distance applications and discusses the monolithic integration of optical receivers with processing elements in standard CMOS technologies. CMOS Multi-Channel Single-Chip Receivers for Multi-Gigabit Optical Data Communications provides the reader with the necessary background knowledge to fully understand the trade-offs in short-distance communication receiver design and presents the key issues to be addressed in the development of such receivers in CMOS technologies. Moreover, novel design approaches are presented. A system-level design methodology allows for the impact analysis of different block specifications and system-wide design optimization. Statistical models are used for design space exploration in the scope of jitter tolerance analysis of clock recovery circuits. CMOS Multi-Channel Single-Chip Receivers for Multi-Gigabit Optical Data Communications is required reading for practicing engineers and researchers in the field of short-distance optical communications and optical CMOS receiver design | ||
| 700 | 1 | |a Leblebici, Yusuf, |d 19..-...., |c informaticien. |4 aut | |
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