Creating Assertion-Based IP
Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-b...
Enregistré dans:
| Auteurs principaux: | , |
|---|---|
| Format: | Livre numérique |
| Langue: | Anglais |
| Publié: |
New York, NY :
Springer US
2008.
Cham : Springer Nature |
| Collection: | Integrated Circuits and Systems
|
| Accès en ligne: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Note: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Creating Assertion-Based IP, Texte imprimé, 9781441942180 • Creating Assertion-Based IP, Texte imprimé, 9780387366418 • Superconducting electronics, edited by Harold Weinstock, Martin Nisenoff, Berlin, Springer-Verlag, 1989, 1 volume (XII-441 p.), NATO ASI series, 0-387-51521-6 |
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| 100 | 1 | |a Foster, Harry, |d 1956- | |
| 245 | 1 | 0 | |a Creating Assertion-Based IP |c by Harry D. Foster, Adam C. Krolnik. |
| 260 | |a New York, NY : |b Springer US. | ||
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| 490 | 0 | |a Integrated Circuits and Systems |x 1558-9420 | |
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| 500 | |a Archives Springer e-books (Licence nationale) | ||
| 505 | 0 | |a Definitions and Terminology -- The Process -- Bus-Based Design Example -- Interfaces -- Arbiters -- Controllers -- Datapath. | |
| 506 | |a Accès en ligne pour les établissements français bénéficiaires des licences nationales | ||
| 506 | |a Accès soumis à abonnement pour tout autre établissement | ||
| 506 | |a Conditions particulières de réutilisation pour les bénéficiaires des licences nationales. chttps://www.licencesnationales.fr/springer-nature-ebooks-contrat-licence-ln-2017 | ||
| 520 | |a Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user s existing verification environment, in other words the testbench infrastructure. The guiding principles promoted in this book when creating an assertion-based IP monitor are: modularity assertion-based IP should have a clear separation between detection and action clarity assertion-based IP should be written initially focusing on capturing intent (versus optimizations) A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers. From the Foreword: Creating Assertion-Based IP " reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP This book will serve as a valuable reference for years to come." Andrew Piziali, Sr. Design Verification Engineer Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology Author, Functional Verification Coverage Measurement and Analysis. | ||
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