Simulation of Semiconductor Processes and Devices 2007 : SISPAD 2007
The "Twelfth International Conference on Simulation of Semiconductor Processes and Devices" (SISPAD 2007) continues a long series of conferences and is held in September 2007 at the TU Wien, Vienna, Austria. The conference is the leading forum for Technology Computer-Aided Design (TCAD) he...
Enregistré dans:
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| Andre forfattere: | , |
| Format: | Livre numérique |
| Sprog: | Anglais |
| Udgivet: |
Vienna :
Springer Vienna
2007.
Cham : Springer Nature |
| Online adgang: | Accès sur la plateforme de l'éditeur Accès sur la plateforme Istex Accès Université d'Orléans Accès INSA CVL |
| Kommentar: |
Archives Springer e-books (Licence nationale) Archives Springer e-books (Licence nationale) |
| Autres localisations: | Voir dans le Sudoc |
| Edition sous un autre format: | • Simulation of semiconductor processes and devices 2007, SISPAD 2007, Tibor Grasser, Siegfried Selberherr (eds.), Wien, Springer Verlag, 2007, 1 vol. (xv-458 p.), 978-3-211-72860-4 • Simulation of Semiconductor Processes and Devices 2007, Texte imprimé, 9783211100707 • Simulation of Semiconductor Processes and Devices 2007, Texte imprimé, 9783709119112 |
Indholdsfortegnelse:
- Nanomanufacturing Technology and Opportunities Through Physically-Based Simulation
- Atomistic Modeling of Defect Diffusion in SiGe
- Diffusion and Deactivation of As in Si: Combining Atomistic and Continuum Simulation Approaches
- Molecular Dynamics Modeling of Octadecaborane Implantation into Si
- High Performance, Strained-Ge, Heterostructure p-MOSFETs
- Strain Induced Drain-Current Enhancement Mechanism in Short-Channel Bulk Ge-pMOSFETs with Different Channel and Surface Orientations
- Validation of the Effect of Full Stress Tensor in Hole Transport in Strained 65nm-Node pMOSFETs
- Modeling and Characterization of Advanced Phosphorus Ultra Shallow Junction Using Germanium and Carbon Coimplants
- Intrinsic Stress Build-Up During Volmer-Weber Crystal Growth
- Strain Energy Driven and Curvature Driven Grain Boundary Migration in 3D-IC Cu Vias
- Modeling of Re-Sputtering Induced Bridge of Tungsten Bit-Lines for NAND Flash Memory Cell with 37nm Node Technology
- Efficient Mask Design for Inverse Lithography Technology Based on 2D Discrete Cosine Transformation (DCT)
- Modeling of Deep Reactive Ion Etching in a Three-Dimensional Simulation Environment
- Comparison of Monte Carlo Transport Models for Nanometer-Size MOSFETs
- Surface Roughness Scattering in Ultrathin-Body SOI MOSFETs
- Pearson Effective Potential vs. Multi-Subband Monte-Carlo Simulation for Electron Transport in DG nMOSFETs
- Inclusion of the Pauli Principle in the Langevin-Boltzmann Equation for Bulk Systems
- Energy Conservation in Collisional Broadening
- A Simple Technique for the Monte Carlo Simulation of Transport in Quantum Wells
- Upcoming Challenges for Process Modeling
- Physics-Based Simulation of 1/f Noise in MOSFETs under Large-Signal Operation
- Thin Body Effects to Suppress Random Dopant Fluctuations in Nano-Scaled MOSFETs
- 'Atomistic' Mesh Generation for the Simulation of Semiconductor Devices
- Line Edge and Gate Interface Roughness Simulations of Advanced VLSI SOI-MOSFETs
- Impact of Shear Strain and Quantum Confinement on Channel nMOSFET with High-Stress CESL
- Analysis of Novel Stress Enhancement Effect Based on Damascene Gate Process with eSiGe S/D for pFETs
- Nonlinear Piezoresistance Effect in Devices with Stressed Etch Stop Liner
- 3D Stress, Process and Device Simulation: Extraction of the Relevant Stress Tensor
- Impact of Two-Step Recessed SiGe S/D Engineering for Advanced pMOSFETs of 32 nm Technology Node and Beyond
- Simulation Study of Multiple FIN FinFET Design for 32nm Technology Node and Beyond
- Device Design and Scalability of an Impact Ionization MOS Transistor with an Elevated Impact Ionization Region
- A Prototype Wafer Processing TCAD Tool Composed of BMD Simulation Module, Metal Gettering and Thermal Stress/Slip Functions for Scaled Device Design Phase
- Compact Modeling of Phase-Change Memories
- Modeling of NBTI Degradation for SiON pMOSFET
- Modeling Study of Ultra-Thin Ge Layers Using Tight-Binding, LCBB and kp Methods
- Analysis of Silicon Dioxide Interface Transition Region in MOS Structures
- Tunneling Properties of MOS Systems Based on High-k Oxides
- First-Principles Investigation on Oxide Trapping
- A Self-Consistent Simulation of InSb Double-Gate MOSFETs Using Full-Band Tight-Binding Approach
- Influence of Oxygen Composition and Carbon Impurity on Electronic Reliability of HfO2
- Upcoming Physics Challenges for Device Modeling
- Transient Characterization of Interface Traps in 4H-SiC MOSFETs
- Electro-Thermal, Transient, Mixed-Mode 2D Simulation Study of SiC Power Thyristors Operating Under Pulsed-PowerConditions
- Numerical Design Study on the Optimal p-Emitter Thickness of 4H-SiC Bipolar Diodes
- Study of Time-Periodic Avalanche Breakdown Occurring in VLD Edge Termination Structures
- Simulation of Magnetotransport in Hole Inversion Layers Based on Full Subbands
- Monte Carlo Study on Number of Scattering Events for Quasi-Ballistic Transport in MOSFETs
- Modeling of Macroscopic Transport Parameters in Inversion Layers
- Study of the Junction Depth Effect on Ballistic Current Using the Subband Decomposition Method
- Transport in Silicon Nanowire and Single-Electron Transistors
- Self-Consistent Simulations of Nanowire Transistors Using Atomistic Basis Sets