Scalable Hardware Verification with Symbolic Simulation

Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner working...

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Detaylı Bibliyografya
Yazar: Bertacco, Valeria
Materyal Türü: Livre numérique
Dil:Anglais
Baskı/Yayın Bilgisi: New York, NY : Springer US 2006.
Cham : Springer Nature
Online Erişim:Accès sur la plateforme de l'éditeur
Accès sur la plateforme Istex
Accès Université d'Orléans
Accès INSA CVL
Not: Archives Springer e-books (Licence nationale)
Archives Springer e-books (Licence nationale)
Autres localisations: Voir dans le Sudoc
Edition sous un autre format:• Scalable Hardware Verification with Symbolic Simulation, Texte imprimé, 9780387244112
• Scalable Hardware Verification with Symbolic Simulation, Texte imprimé, 9780387505053
• Scalable Hardware Verification with Symbolic Simulation, Texte imprimé, 9781441937391
İçindekiler:
  • Design and Verification of Digital Systems
  • Symbolic Simulation
  • Compacting Intermediate States
  • Approximate Simulation
  • Exact Parametrizations
  • Conclusion.